Properties Cache hierarchy

1 properties

1.1 banked versus unified
1.2 inclusion policies
1.3 write policies
1.4 shared versus private

properties

cache organization l1 cache separate , l2 cache unified


banked versus unified

in banked cache, cache divided instruction cache , data cache. in contrast, unified cache contains both instructions , data combined in same cache. during process, upper-level cache accessed instructions processor in each cycle. cache accessed data. requiring both actions implemented @ same time requires multiple ports in cache , takes more access time. having multiple ports requires additional hardware , wiring leading huge structure. therefore, l1 cache organized banked cache results in fewer ports, less hardware , low access time.

the lower level caches l2 , l3 accessed when there miss in l1 cache implies frequency of access lower level caches less compared l1 cache. therefore, unified organization implemented in lower level caches having single port suffice.

inclusion policies

inclusive cache organization

whether block present in upper cache layer can present in lower cache level governed inclusion policies below:

inclusive
exclusive
non-inclusive non-exclusive (nine)

in inclusive policy, blocks present in upper-level cache has present in lower level cache well. each upper-level cache component subset of lower level cache component. in case, since there duplication of blocks there wastage of memory. checking better in case of inclusive because if lower level cache doesn t have block can sure upper-level cache can no way have block.

in exclusive policy, cache hierarchy components exclusive implies element in upper-level cache not present in of lower cache component. enables complete usage of cache memory no same block present in other cache component. however, there high memory access latency.

the above policies require set on rules followed in order implement them. if none of these forced, resulting inclusion policy called non-inclusive non-exclusive (nine). means upper level cache may or may not present in lower level cache.

write policies

there 2 policies define way in modified cache block updated in main memory:

write through
write back

in case of write through policy whenever value of cache block changes, further modified in lower-level memory hierarchy well. policy ensures data stored safely written throughout hierarchy.

however, in case of write policy, changed cache block updated in lower-level hierarchy when cache block evicted. writing every cache block evicted not efficient. therefore, use concept of dirty bit attached each cache block. dirty bit made high whenever cache block modified , during eviction, blocks dirty bit high written lower-level hierarchy , dirty bit cleared. in policy, there data losing risk valid copy stored in cache , therefore need correction techniques implemented.

in case of write byte not present in cache block write policies below determine whether byte has brought cache or not:

write allocate
write no-allocate

write allocate policy states in case of write miss, block fetched main memory , placed in cache before writing. in write no-allocate policy, if block missed in cache write in lower level memory hierarchy without fetching block cache.

the common combinations of policies write write allocate , write through write no-allocate.

cache organization l1 private , l2 , l3 shared


shared versus private

a private cache private particular core , cannot accessed other cores. since each core has own private cache there might duplicate blocks in cache leads reduced capacity utilization. however, organization leads lower latency.

a shared cache shared among multiple cores , therefore can directly accessed of cores. since shared, each block in cache unique , therefore has more hit rate there no duplicate blocks. however, cache hit latency larger multiple cores try access same cache.

in multi-core processors, organization of cache shared or private impacts performance of processor. in practice, upper-level cache l1 (or l2) implemented private , lower level caches implemented shared.